Newsroom

News

Feb., 19, 2015

Mentor Graphics and Verisense Present Full Toolset at CTIC for DO-254-Compliant Design

From Mentor

HDL Designer Series™ platform: a complete RTL-based integrated design environment that allows automatic design checking that is critical for ‘high assurance ‘FPGA and ASIC designs.

Questa® Verification platform: a complete verification platform addressing challenges in areas like multiple clock domains, power and security domains and ultimately software.

ReqTracer™ Software: a tool that links, manages and tracks requirements from multiple sources throughout the design process, and provides easy documentation and reports at any stage. 


From Verisense

The VS-254 FPGA in-hardware verification tester tool:  providing the complete required DO-254 functionality also for high-speed interfaces, including pin-level verification on all pins and full robustness testing on all high-speed interfaces. 


To Learn More

Mentor Graphics and Verisense are discussing their tools in a presentation at the CTIC on February 25, 2015 at 13:50, and on February 25, 2015 at 16:55. The companies will also display their tools together at their booth.